关键词：rk3399-opp.dtsi , linux-4.4, rockchip, dts
dts — rk3399-opp.dtsi
/*
* Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include "rk3399-sched-energy.dtsi"
/ {
cluster0_opp: opp-table0 {
compatible = "operating-points-v2";
opp-shared;
rockchip,temp-hysteresis = <5000>;
rockchip,low-temp = <10000>;
rockchip,low-temp-min-volt = <900000>;
nvmem-cells = <&cpul_leakage>, <&specification_serial_number>;
nvmem-cell-names = "cpu_leakage",
"specification_serial_number";
clocks = <&cru PLL_APLLL>;
rockchip,avs-scale = <20>;
rockchip,bin-scaling-sel = <
0 30
1 34
>;
rockchip,pvtm-voltage-sel = <
0 143500 0
143501 148500 1
148501 152000 2
152001 999999 3
>;
rockchip,pvtm-freq = <408000>;
rockchip,pvtm-volt = <1000000>;
rockchip,pvtm-ch = <0 0>;
rockchip,pvtm-sample-time = <1000>;
rockchip,pvtm-number = <10>;
rockchip,pvtm-error = <1000>;
rockchip,pvtm-ref-temp = <41>;
rockchip,pvtm-temp-prop = <115 66>;
rockchip,thermal-zone = "soc-thermal";
opp-408000000 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <825000 825000 1250000>;
opp-microvolt-L0 = <825000 825000 1250000>;
opp-microvolt-L1 = <825000 825000 1250000>;
opp-microvolt-L2 = <825000 825000 1250000>;
opp-microvolt-L3 = <825000 825000 1250000>;
clock-latency-ns = <40000>;
};
opp-600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <825000 825000 1250000>;
opp-microvolt-L0 = <825000 825000 1250000>;
opp-microvolt-L1 = <825000 825000 1250000>;
opp-microvolt-L2 = <825000 825000 1250000>;
opp-microvolt-L3 = <825000 825000 1250000>;
clock-latency-ns = <40000>;
};
opp-816000000 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <850000 850000 1250000>;
opp-microvolt-L0 = <850000 850000 1250000>;
opp-microvolt-L1 = <825000 825000 1250000>;
opp-microvolt-L2 = <825000 825000 1250000>;
opp-microvolt-L3 = <825000 825000 1250000>;
clock-latency-ns = <40000>;
opp-suspend;
};
opp-1008000000 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <925000 925000 1250000>;
opp-microvolt-L0 = <925000 925000 1250000>;
opp-microvolt-L1 = <900000 900000 1250000>;
opp-microvolt-L2 = <875000 875000 1250000>;
opp-microvolt-L3 = <850000 850000 1250000>;
clock-latency-ns = <40000>;
};
opp-1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <1000000 1000000 1250000>;
opp-microvolt-L0 = <1000000 1000000 1250000>;
opp-microvolt-L1 = <975000 975000 1250000>;
opp-microvolt-L2 = <950000 950000 1250000>;
opp-microvolt-L3 = <925000 925000 1250000>;
clock-latency-ns = <40000>;
};
opp-1416000000 {
opp-hz = /bits/ 64 <1416000000>;
opp-microvolt = <1125000 1125000 1250000>;
opp-microvolt-L0 = <1125000 1125000 1250000>;
opp-microvolt-L1 = <1100000 1100000 1250000>;
opp-microvolt-L2 = <1075000 1075000 1250000>;
opp-microvolt-L3 = <1050000 1050000 1250000>;
clock-latency-ns = <40000>;
};
};
cluster1_opp: opp-table1 {
compatible = "operating-points-v2";
opp-shared;
rockchip,temp-hysteresis = <5000>;
rockchip,low-temp = <10000>;
rockchip,low-temp-min-volt = <900000>;
nvmem-cells = <&cpub_leakage>, <&specification_serial_number>;
nvmem-cell-names = "cpu_leakage",
"specification_serial_number";
clocks = <&cru PLL_APLLB>;
rockchip,avs-scale = <8>;
rockchip,bin-scaling-sel = <
0 8
1 17
>;
rockchip,pvtm-voltage-sel = <
0 149000 0
149001 155000 1
155001 160000 2
160001 999999 3
>;
rockchip,pvtm-freq = <408000>;
rockchip,pvtm-volt = <1000000>;
rockchip,pvtm-ch = <1 0>;
rockchip,pvtm-sample-time = <1000>;
rockchip,pvtm-number = <10>;
rockchip,pvtm-error = <1000>;
rockchip,pvtm-ref-temp = <41>;
rockchip,pvtm-temp-prop = <71 35>;
rockchip,thermal-zone = "soc-thermal";
opp-408000000 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <825000 825000 1250000>;
opp-microvolt-L0 = <825000 825000 1250000>;
opp-microvolt-L1 = <825000 825000 1250000>;
opp-microvolt-L2 = <825000 825000 1250000>;
opp-microvolt-L3 = <825000 825000 1250000>;
clock-latency-ns = <40000>;
};
opp-600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <825000 825000 1250000>;
opp-microvolt-L0 = <825000 825000 1250000>;
opp-microvolt-L1 = <825000 825000 1250000>;
opp-microvolt-L2 = <825000 825000 1250000>;
opp-microvolt-L3 = <825000 825000 1250000>;
clock-latency-ns = <40000>;
};
opp-816000000 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <825000 825000 1250000>;
opp-microvolt-L0 = <825000 825000 1250000>;
opp-microvolt-L1 = <825000 825000 1250000>;
opp-microvolt-L2 = <825000 825000 1250000>;
opp-microvolt-L3 = <825000 825000 1250000>;
clock-latency-ns = <40000>;
opp-suspend;
};
opp-1008000000 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <875000 875000 1250000>;
opp-microvolt-L0 = <875000 875000 1250000>;
opp-microvolt-L1 = <850000 850000 1250000>;
opp-microvolt-L2 = <850000 850000 1250000>;
opp-microvolt-L3 = <850000 850000 1250000>;
clock-latency-ns = <40000>;
};
opp-1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <950000 950000 1250000>;
opp-microvolt-L0 = <950000 950000 1250000>;
opp-microvolt-L1 = <925000 925000 1250000>;
opp-microvolt-L2 = <900000 900000 1250000>;
opp-microvolt-L3 = <875000 875000 1250000>;
clock-latency-ns = <40000>;
};
opp-1416000000 {
opp-hz = /bits/ 64 <1416000000>;
opp-microvolt = <1025000 1025000 1250000>;
opp-microvolt-L0 = <1025000 1025000 1250000>;
opp-microvolt-L1 = <1000000 1000000 1250000>;
opp-microvolt-L2 = <1000000 1000000 1250000>;
opp-microvolt-L3 = <975000 975000 1250000>;
clock-latency-ns = <40000>;
};
opp-1608000000 {
opp-hz = /bits/ 64 <1608000000>;
opp-microvolt = <1100000 1100000 1250000>;
opp-microvolt-L0 = <1100000 1100000 1250000>;
opp-microvolt-L1 = <1075000 1075000 1250000>;
opp-microvolt-L2 = <1050000 1050000 1250000>;
opp-microvolt-L3 = <1025000 1025000 1250000>;
clock-latency-ns = <40000>;
};
opp-1800000000 {
opp-hz = /bits/ 64 <1800000000>;
opp-microvolt = <1200000 1200000 1250000>;
opp-microvolt-L0 = <1200000 1200000 1250000>;
opp-microvolt-L1 = <1175000 1175000 1250000>;
opp-microvolt-L2 = <1150000 1150000 1250000>;
opp-microvolt-L3 = <1125000 1125000 1250000>;
clock-latency-ns = <40000>;
};
};
gpu_opp_table: opp-table2 {
compatible = "operating-points-v2";
rockchip,thermal-zone = "soc-thermal";
rockchip,temp-hysteresis = <5000>;
rockchip,low-temp = <10000>;
rockchip,low-temp-min-volt = <900000>;
nvmem-cells = <&gpu_leakage>;
nvmem-cell-names = "gpu_leakage";
rockchip,pvtm-voltage-sel = <
0 121000 0
121001 125500 1
125501 128500 2
128501 999999 3
>;
rockchip,pvtm-freq = <200000>;
rockchip,pvtm-volt = <900000>;
rockchip,pvtm-ch = <3 0>;
rockchip,pvtm-sample-time = <1000>;
rockchip,pvtm-number = <10>;
rockchip,pvtm-error = <1000>;
rockchip,pvtm-ref-temp = <41>;
rockchip,pvtm-temp-prop = <46 12>;
rockchip,pvtm-thermal-zone = "gpu-thermal";
opp-200000000 {
opp-hz = /bits/ 64 <200000000>;
opp-microvolt = <825000>;
opp-microvolt-L0 = <825000>;
opp-microvolt-L1 = <825000>;
opp-microvolt-L2 = <825000>;
opp-microvolt-L3 = <825000>;
};
opp-300000000 {
opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <825000>;
opp-microvolt-L0 = <825000>;
opp-microvolt-L1 = <825000>;
opp-microvolt-L2 = <825000>;
opp-microvolt-L3 = <825000>;
};
opp-400000000 {
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <825000>;
opp-microvolt-L0 = <825000>;
opp-microvolt-L1 = <825000>;
opp-microvolt-L2 = <825000>;
opp-microvolt-L3 = <825000>;
};
opp-600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <925000>;
opp-microvolt-L0 = <925000>;
opp-microvolt-L1 = <925000>;
opp-microvolt-L2 = <900000>;
opp-microvolt-L3 = <900000>;
};
opp-800000000 {
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <1100000>;
opp-microvolt-L0 = <1100000>;
opp-microvolt-L1 = <1075000>;
opp-microvolt-L2 = <1050000>;
opp-microvolt-L3 = <1025000>;
};
};
dmc_opp_table: opp-table3 {
compatible = "operating-points-v2";
opp-200000000 {
opp-hz = /bits/ 64 <200000000>;
opp-microvolt = <900000>;
};
opp-300000000 {
opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <900000>;
};
opp-400000000 {
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <900000>;
};
opp-528000000 {
opp-hz = /bits/ 64 <528000000>;
opp-microvolt = <900000>;
};
opp-600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <900000>;
};
opp-800000000 {
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <900000>;
};
};
};
&cpu_l0 {
operating-points-v2 = <&cluster0_opp>;
sched-energy-costs = <&RK3399_CPU_COST_0 &RK3399_CLUSTER_COST_0>;
};
&cpu_l1 {
operating-points-v2 = <&cluster0_opp>;
sched-energy-costs = <&RK3399_CPU_COST_0 &RK3399_CLUSTER_COST_0>;
};
&cpu_l2 {
operating-points-v2 = <&cluster0_opp>;
sched-energy-costs = <&RK3399_CPU_COST_0 &RK3399_CLUSTER_COST_0>;
};
&cpu_l3 {
operating-points-v2 = <&cluster0_opp>;
sched-energy-costs = <&RK3399_CPU_COST_0 &RK3399_CLUSTER_COST_0>;
};
&cpu_b0 {
operating-points-v2 = <&cluster1_opp>;
sched-energy-costs = <&RK3399_CPU_COST_1 &RK3399_CLUSTER_COST_1>;
};
&cpu_b1 {
operating-points-v2 = <&cluster1_opp>;
sched-energy-costs = <&RK3399_CPU_COST_1 &RK3399_CLUSTER_COST_1>;
};
&gpu {
operating-points-v2 = <&gpu_opp_table>;
};
&dmc {
operating-points-v2 = <&dmc_opp_table>;
};